General procedure for two integrator loops fractional order oscillators with controlled phase difference

This paper studies the fractional order two integrator loop based sinusoidal oscillators with two fractional order elements of different orders. Two general cases have been discussed and closed forms for the oscillation frequency and oscillation condition are driven. In addition, the effect of the fractional orders on the phase difference between the two oscillatory outputs is also presented. Design procedure for the two general cases is illustrated with numerical examples and validated through circuit simulations for three examples of oscillators based on two integrator loops. © 2013 IEEE.

CCII based KHN fractional order filter

This work aims to generalize the analysis of the fractional order filter to work for the low-pass, band-pass and high-pass responses. So, general expression for the maximum and minimum frequency points and the half power frequency points will be derived. In addition, the effect of the transfer function parameters on the filter poles and hence the stability is introduced. Besides, the effect of the fractional orders on the frequency response will be presented. Finally, to verify the numerical analysis and the proposed design procedure, circuit simulation will be used. © 2013 IEEE.

Image encryption using generalized tent map

This paper introduces two generalized tent maps where the conventional map is a special case. Although the output of the conventional tent map shows different responses, it has only one control parameter that limits its behavior and applications. The proposed generalized tent maps increase the degrees of freedom and produce a versatile response that can fit many applications. The characteristics of each generalization are discussed such as: fixed points, bifurcation diagrams, and Lyapunov exponents. Finally, a simple image encryption application, based on the generalized tent maps, is presented for the design of long encryption key using the added parameters. Moreover, statistical and sensitivity analysis are presented to demonstrate the benefits of the generalized maps. © 2013 IEEE.

Design of pseudo random keystream generator using fractals

This paper presents a novel method for designing a pseudo random keystream generator (PRKG) based on fractal images. Although a fractal image has high correlation between its pixels, the proposed technique succeeds in almost eliminating this correlation and the output stream passes the NIST statistical test suite. The post-processing on the fractals is based only on a confusion process and uses a nonlinear network with a delay block to randomize the output stream. Many statistical measures and the NIST suite have been used to evaluate the processed fractals and the results are promising. As an example to validate the PRKG, the output stream is used in a simple image encryption system. The encrypted image is tested by calculating pixel correlations, differential attack measures, entropy and it also passes the NIST test suite. © 2013 IEEE.

The modified single input Op-Amps memristor based oscillator

This paper introduces the modified single input Op-Amps memristor based oscillator. The oscillator is realized with ideal, LM741 and current feedback (AD844) Op-Amps where memristors replace resistors. The effect of memristor on the oscillation frequency and the oscillation condition that are totally independent is studied. This helped in studying the whole operation regime of the memristor. The effect of initial conditions on the circuit behavior is discussed. The dynamic poles of the oscillator after resistors replacement are illustrated. Sustained oscillation is obtained and simulated results are nearly matched to the calculated results. © 2013 IEEE.

Memristor-based balanced ternary adder

This paper introduces a memristor based ternary adder, which is an essential building block for any arithmetic ternary operations. The proposed ternary adder circuit tries to achieve the theoretical advantages of the ternary system, increase the density and decrease the processing time by using the memristor properties such as its hysteresis and nanotechnology. The general block diagram of the proposed circuit is illustrated based on memristors and its operation has been validated via different examples using PSPICE where simulation results show a great match. © 2013 IEEE.