This paper presents two general topologies of fractional order oscillators. They employ Current Feedback Op-Amp (CFOA) and RC networks. Two RC networks are investigated for each presented topology. The general oscillation frequency, condition and the phase difference between the oscillatory outputs are investigated in terms of the fractional order parameters. Numerical simulations and P-Spice simulation results are provided for some cases to validate the theoretical findings. The fractional order parameters increase the design flexibility and controllability which is proved by the provided experimental results. © 2018 IEEE.
Dynamics of fractional and double-humped logistic maps versus the conventional one
This paper presents the dynamic analysis of two discrete logistic chaotic maps versus the conventional map. The first map is the fractional logistic map with the extra degrees of freedom provided by the added number of variables. It has two more variables over the conventional one. The second map is the double-humped logistic map. It is a fourth-order map which increases the non-linearity over the conventional one. The dynamics of the three maps are discussed in details, including mathematical derivations of fixed points, stability analysis, bifurcation diagrams and the study of their chaotic regions. The chaotic behavior of the three maps, is investigated using the Maximum Lyapunov exponent (MLE). © 2017 IEEE.
FPGA Speech Encryption Realization Based on Variable S-Box and Memristor Chaotic Circuit
This paper introduces a new encryption/decryption scheme based on a dynamic substitution box concept. Values of the proposed S-Box are different for each sample depending on the behavior of a memristor-based chaotic system. MATLAB simulations and FPGA implementation for the circuit are presented with throughput 4.266 Gbit/s. Also, FPGA realization for encryption/decryption scheme is proposed. Entropy, MSE, correlation coefficient tests are applied on two different input files to examine the efficiency of this cryptosystem. © 2018 IEEE.
Mathematical analysis of gene regulation activator model
This paper presents a complete analysis of the mathematical model of the gene regulation process. The model describes the induced gene expression under the effect of activators. The model differential equations are solved analytically, and the exact solution of the gene model is introduced. Moreover, a study of the model dynamics, including the fixed points and stability conditions are presented. The parameters effects on the phase plane portraits and the transient responses of the mRNA as well as the protein concentrations are intensively detailed. This work serves as a brick stone towards a complete model for a complete gene regulation biological process for future prediction and control of diseases at the genetic level. © 2018 IEEE.
Memristor-CNTFET based Ternary Comparator unit
This paper proposes a new design for ternary logic comparator unit based on memristive threshold logic concept. To provide high-performance design, integrating memristor and Carbon Nano-Tube Field-Effect Transistor, CNTFET, is used. A comparison with other related work is presented to discuss performance aspects. It shows that performance has been improved by 75% compared with the other related work. Therefore, the proposed design is very promising to build high-performance full ternary ALU memristor-based unit. © 2018 IEEE.
Hardware Speech Encryption Using a Chaotic Generator, Dynamic Shift and Bit Permutation
This paper proposes a speech encryption and decryption system, its hardware architecture design and FPGA implementation. The system utilizes Nosé Hoover chaotic generator and/or dynamic shift and bit permutation. The effect of different blocks in the proposed encryption scheme is studied and the security of the system is validated through perceptual and statistical tests. The complete encryption scheme is simulated using Xilinx ISE 14.5 and realized on FPGA Xilinx Kintex 7, presenting the experimental results on the oscilloscope. The efficiency is also validated through hardware resources utilization compared to previous works based on maximum frequency and throughput. © 2018 IEEE.
FPGA Implementation of X- and Heart-shapes Controllable Multi-Scroll Attractors
This paper proposes new multi-scrolls chaotic systems which is called the X-shape
Fractional-Order Relaxation Oscillators Based on Op-Amp and OTRA
This paper introduces closed formulas of two topologies of fractional-order relaxation oscillators
FPGA realization of speech encryption based on modified chaotic logistic map
This paper presents an FPGA design and implementation of a chaotic speech encryption and decryption system based on bit permutations
Security and Efficiency of Feistel Networks Versus Discrete Chaos for Lightweight Speech Encryption
This paper compares examples of non-chaotic and chaotic ciphers from the viewpoint of their suitability for speech encryption, especially in real-time and lightweight cipher systems