FPGA implementation of integer/fractional chaotic systems

2020Abd El-Kader A.A.Abd El-Maksoud A.J.Abu-Elyazeed M.F.Book ChapterHassan B.G.Radwan A.G.Rihan N.G.Said L.A.Tolba M.F.

Chaotic systems have remarkable importance in capturing some complex features of the physical process. Recently, fractional calculus becomes a vigorous tool in characterizing the dynamics of complex systems. The fractional-order chaotic systems increase the chaotic behavior in new dimensions and add extra degrees of freedom, which increase system controllability. In this chapter, FPGA implementation of different integer and fractional-order chaotic systems is presented. The investigated integer-order systems include Chua double scroll chaotic system and the modified Chua N-scroll chaotic system. The investigated fractional-order systems include Chua, Yalcin et al., Ozuogos et al., and Tang et al., chaotic systems. These systems are implemented and simulated based on the Grunwald–Letnikov (GL) definition with different window sizes. The parameters effect, along with different GL window sizes is investigated where some interesting chaotic behaviors are obtained. The proposed FPGA implementation utilizes fewer resources and has high throughput. Experimental results are provided on a digital oscilloscope. © Springer Nature Switzerland AG 2020.

A study of the nonlinear dynamics of human behavior and its digital hardware implementation

2020Elsafty A.H.JournalMadian A.H.Radwan A.G.Said L.A.Tolba M.F.

This paper introduces an intensive discussion for the dynamical model of the love triangle in both integer and fractional-order domains. Three different types of nonlinearities soft, hard, and mixed between soft and hard, are used in this study. MATLAB numerical simulations for the different three categories are presented. Also, a discussion for how the kind of personalities affects the behavior of chaotic attractors is introduced. This paper suggests some explanations for the complex love relationships depending on the impact of memory (IoM) principle. Lyapunov exponents, Kaplan-Yorke dimension, and bifurcation diagrams for three different integer-order cases show a significant dependency on system parameters. Hardware digital realization of the system is done using the Xilinx Artix-7 XC7A100T FPGA kit. Version 14.7 from the Xilinx ISE platform is used in both Verilog simulation and hardware implementation stages. The digital approach of such a system opens the door to predict the love relation after sensing the human personality. Also, this study will help in justifying more human emotions like happiness, panic, and fear accurately. Perhaps shortly, this study may combine with artificial intelligence to demonstrate Human-Computer interaction products. © 2020

A novel image encryption system merging fractional-order edge detection and generalized chaotic maps

2020Abu-Elyazeed M.F.Ismail S.M.JournalMadian A.H.Radwan A.G.Said L.A.

This paper presents a novel lossless image encryption algorithm based on edge detection and generalized chaotic maps for key generation. Generalized chaotic maps, including the fractional-order, the delayed, and the Double-Humped logistic maps, are used to design the pseudo-random number key generator. The generalization parameters add extra degrees of freedom to the system and increase the keyspace achieving more secure keys. Fractional order edge detection filters exhibited better noise robustness than the conventional integer-order ones, rendering the system to be suitable for medical imaging security. The proposed system flexibly integrate different edge detectors, as well as various logistic maps for key generation. The sensitivity of the chaotic maps to all parameters guarantees the encryption system key sensitivity. Security analyses aspects assure the efficiency of the proposed algorithm performance, having high pixel correlation coefficients and flat histograms of cipher images reported. A comparison between the proposed scheme with existing cryptosystems is also presented, regarding histogram uniformity, contrast analysis, Shannon entropy measurements. Compared to the state of the art algorithms, the proposed algorithm has higher statistical and cryptanalytic properties. © 2019

Emulation circuits of fractional-order memelements with multiple pinched points and their applications

2020JournalKhalil N.A.Radwan A.G.Said L.A.Soliman A.M.

This paper proposes voltage- and current-controlled universal memelements emulators. They are employed to realize the floating and grounded fractional-order memelements. The proposed emulators are implemented using different active blocks such as the second-generation current conveyor (CCII), Differential input double output transconductance amplifier (DOTA + ), balanced output CCII, and Differential voltage current conveyor (DVCC) with analog voltage multiplier. One of the main characteristics of the memristive elements is hysteresis loop behaviour with one pinched point, and the higher-order memelements have multiple pinched points. The higher fractional-order memductance (FOM) and inverse memductance (FOIM) emulators are proposed, which achieve multiple pinched-off points. The coordinates of the multiple pinched-off points and the conditions to achieve them are discussed in the I-V plane. Additionally, the effect of different orders ? of the fractional-order capacitor (FOC) on the memelements characteristic is discussed. The circuit simulations for the proposed emulators have been verified using PSPICE simulations and validated experimentally at different orders. Finally, the grounded proposed emulator is employed in Chua’s chaotic oscillator as an application presenting the effect of fractional-order on the chaotic response. Also, the floating proposed emulator is applied to a relaxation oscillator, to show the reliability of the proposed emulator. © 2020

Optimal Charging and Discharging of Supercapacitors

2020Abdelaty A.M.Elbarawy M.T.M.M.Fouda M.E.JournalRadwan A.G.

In this paper, we discuss the optimal charging and discharging of supercapacitors to maximize the delivered energy by deploying the fractional and multivariate calculus of variations. We prove mathematically that the constant current is the optimal charging and discharging method under R s -CPE model of supercapacitors. The charging and round-trip efficiencies have been mathematically analyzed for constant current charging and discharging. © 2020 The Electrochemical Society (“ECS”). Published on behalf of ECS by IOP Publishing Limited.

Chaotic Dynamics and FPGA Implementation of a Fractional-Order Chaotic System with Time Delay

2020JournalRadwan A.G.Roshdy M.Said L.A.Sayed W.S.

This article proposes a numerical solution approach and Field Programmable Gate Array implementation of a delayed fractional-order system. The proposed method is amenable to a sufficiently efficient hardware realization. The system’s numerical solution and hardware realization have two requirements. First, the delay terms are implemented by employing LookUp Tables to keep the already required delayed samples in the dynamical equations. Second, the fractional derivative is numerically approximated using Grünwald-Letnikov approximation with a memory window size, L, according to the short memory principle such that it balances between accuracy and efficiency. Bifurcation diagrams and spectral entropy validate the chaotic behaviour of the system for commensurate and incommensurate orders. Additionally, the dynamic behaviour of the system is studied versus the delay parameter, ?, and the window size, L. The system is realized on Nexys 4 Artix-7 FPGA XC7A100T with throughput 1.2 Gbit/s and hardware resources utilization 15% from the total LookUp Tables and 4% from the slice registers. Oscilloscope experimental results verify the numerical solution of the delayed fractional-order system. The amenability to digital hardware realization, which is experimentally validated in this article, is added to the system’s advantages and encourages its utilization in future digital applications such as chaos control and synchronization and chaos-based communication applications. © 2020 IEEE.

Self-Reproducing Hidden Attractors in Fractional-Order Chaotic Systems Using Affine Transformations

2020JournalRadwan A.G.Sayed W.S.

This article proposes a unified approach for hidden attractors control in fractional-order chaotic systems. Hidden attractors have small basins of attractions and are very sensitive to initial conditions and parameters. That is, they can be easily drifted from chaotic behavior into another type of dynamics, which is not suitable for encryption applications that require quite wide initial conditions and parameters ranges for encryption key design. Hence, a systematic coordinate affine transformation framework is utilized to construct transformed systems with self-reproducing attractors. Simulation results of two three-dimensional fractional-order chaotic systems with hidden attractors validate that the proposed framework supports attractors geometric structure design and multi-wing generation. Hidden attractor size, polarity, phase, shape and position control while preserving the chaotic dynamics is indicated by strange attractors, spectral entropy, maximum Lyapunov exponent and bifurcation diagrams. Simulations demonstrate the capability of multi-wing generation from fractional-order hidden attractors with no equilibria using non-autonomous parameters as opposed to the classical equilibria extension techniques suitable only for self-excited attractors. The self-reproduced multiple wings can share the same center point or be distributed along an arbitrary line, curve or surface thanks to the non-autonomous translation parameters. Multi-wing attractors widen the basin of attraction and enlarge the state space volume. For practical applications, the proposed technique makes fractional-order systems with hidden attractors suitable for circuit implementations that require specific signal level and polarity conditions. In addition, for digital encryption applications, the relatively wide range of the extra parameters enhances the key space and hence the robustness against brute force attacks. © 2020 IEEE.