This paper introduces a memristor based N-bits redundant binary adder architecture for canonic signed digit code CSDC as a step towards memristor based multilevel ALU
Memristor-based redundant binary adder
This paper introduces a memristor based ternary adder, which is an essential building block for any arithmetic ternary operations
Memristor-MOS hybrid circuit redundant multiplier
This paper introduces a step forward towards memristor-MOS hybrid circuit to achieve any combinational function