This paper introduces a new encryption/decryption scheme based on a dynamic substitution box concept. Values of the proposed S-Box are different for each sample depending on the behavior of a memristor-based chaotic system. MATLAB simulations and FPGA implementation for the circuit are presented with throughput 4.266 Gbit/s. Also, FPGA realization for encryption/decryption scheme is proposed. Entropy, MSE, correlation coefficient tests are applied on two different input files to examine the efficiency of this cryptosystem. © 2018 IEEE.
A Digital Hardware Implementation for A new Mixed-Order Nonlinear 3-D Chaotic System
This paper introduces a new encryption/decryption scheme based on a dynamic substitution box concept
Incremental Grounded Voltage Controlled Memristor Emulator
Memristor has become an interesting research subject in the recent years
Study of fractional flux-controlled memristor emulator connections
In this paper, the series and parallel connections of the fractional flux-controlled memristors are studied
A study of the nonlinear dynamics of human behavior and its digital hardware implementation
This paper introduces an intensive discussion for the dynamical model of the love triangle in both integer and fractional-order domains. Three different types of nonlinearities soft, hard, and mixed between soft and hard, are used in this study. MATLAB numerical simulations for the different three categories are presented. Also, a discussion for how the kind of personalities affects the behavior of chaotic attractors is introduced. This paper suggests some explanations for the complex love relationships depending on the impact of memory (IoM) principle. Lyapunov exponents, Kaplan-Yorke dimension, and bifurcation diagrams for three different integer-order cases show a significant dependency on system parameters. Hardware digital realization of the system is done using the Xilinx Artix-7 XC7A100T FPGA kit. Version 14.7 from the Xilinx ISE platform is used in both Verilog simulation and hardware implementation stages. The digital approach of such a system opens the door to predict the love relation after sensing the human personality. Also, this study will help in justifying more human emotions like happiness, panic, and fear accurately. Perhaps shortly, this study may combine with artificial intelligence to demonstrate Human-Computer interaction products. © 2020
Hardware realization of a secure and enhanced s-box based speech encryption engine
This paper presents a secure and efficient substitution box (s-box) for speech encryption applications. The proposed s-box data changes every clock cycle to swap the input signal with different data, where it generated based on a new algorithm and a memristor chaotic system. Bifurcation diagrams for all memristor chaotic system parameters are introduced to stand for the chaotic range of each parameter. Moreover, the effect of each component inside the proposed encryption system is studied, and the security of the system is validated through perceptual and statistical tests. The size of the encryption key is 175 bits to meet the global standards for the optimum encryption key width (> 128). MATLAB software is used to calculate entropy, MSE, and correlation coefficient. Both chaotic circuit and encryption/decryption schemes are designed using Verilog HDL and simulated by Xilinx ISE 14.7. Xilinx Virtex 5 FPGA kit is used to realize the proposed algorithm with a throughput 0.536 of Gbit/s. The cryptosystem is tested using two different speech files to examine its efficiency. © 2020, Springer Science+Business Media, LLC, part of Springer Nature.
Center pulse width modulation implementation based on memristor
This paper introduces two new versions for memristor-based center pulse-width modulator (PWM) circuits
Enhanced hardware implementation of a mixed-order nonlinear chaotic system and speech encryption application
This paper introduces a study for the effect of using different floating-point representations on the chaotic system’s behaviour
Synchronization and FPGA realization of fractional-order Izhikevich neuron model
This paper generalizes the Izhikevich neuron model in the fractional-order domain for better modeling of neuron dynamics