This paper presents a novel method for designing a pseudo random keystream generator (PRKG) based on fractal images. Although a fractal image has high correlation between its pixels, the proposed technique succeeds in almost eliminating this correlation and the output stream passes the NIST statistical test suite. The post-processing on the fractals is based only on a confusion process and uses a nonlinear network with a delay block to randomize the output stream. Many statistical measures and the NIST suite have been used to evaluate the processed fractals and the results are promising. As an example to validate the PRKG, the output stream is used in a simple image encryption system. The encrypted image is tested by calculating pixel correlations, differential attack measures, entropy and it also passes the NIST test suite. © 2013 IEEE.
Generalized delayed logistic map suitable for pseudo-random number generation
This paper presents the generalization of a delayed version of the logistic map. The effect of the added two general parameters is studied, which offers the option of having three different maps. The dynamic behavior of the vertical, zooming and the general map is analyzed. The study of the fixed points, stability ranges and bifurcation diagram of the delayed logistic map at hand is detailed in this work. The flow of the system behavior from stability to chaos is also presented with its transient response as well as its phase plane portraits. Moreover, using the general parameters, the option of designing any specific map is validated by some design examples, which makes it more optimal for any specific applications. The added general parameters offer increased randomness with controllability of the map design, making it more suitable for pseudo-random sequence generators which are used in image encryption algorithms and in secure communication transfer. © 2015 IEEE.
Design of a generalized bidirectional tent map suitable for encryption applications
The discrete tent map is one of the most famous discrete chaotic maps that has widely-spread applications. This paper investigates a set of four generalized tent maps where the conventional map is a special case. The proposed maps have extra degrees of freedom which provide different chaotic characteristics and increase the design flexibility required for many applications. Mathematical analyses for generalized positive and mostly positive tent maps include: bifurcation diagrams relative to all parameters, effective range of parameters, bifurcation points. The maximum Lyapunov exponent (MLE) is also calculated to indicate chaotic behavior. Various scales of the bifurcation diagram are discussed for each generalized map as well as system responses versus the added parameters. © 2015 IEEE.
Chaotic systems based on jerk equation and discrete maps with scaling parameters
In the recent decades, applications of chaotic systems have flourished in various fields. Hence, there is an increasing demand on generalized, modified and novel chaotic systems. In this paper, we combine the general equation of jerk-based chaotic systems with simple scaled discrete chaotic maps. Numerical simulations of the properties of two systems, each with four control parameters, are presented. The parameters show interesting behaviors and dependencies among them. In addition, they exhibit controlling capabilities of the ranges of system responses, hence the size of the attractor diagram. Moreover, these behaviors and dependencies are analogous to those of the corresponding discrete chaotic maps. © 2017 IEEE.
Hardware Speech Encryption Using a Chaotic Generator, Dynamic Shift and Bit Permutation
This paper proposes a speech encryption and decryption system, its hardware architecture design and FPGA implementation. The system utilizes Nosé Hoover chaotic generator and/or dynamic shift and bit permutation. The effect of different blocks in the proposed encryption scheme is studied and the security of the system is validated through perceptual and statistical tests. The complete encryption scheme is simulated using Xilinx ISE 14.5 and realized on FPGA Xilinx Kintex 7, presenting the experimental results on the oscilloscope. The efficiency is also validated through hardware resources utilization compared to previous works based on maximum frequency and throughput. © 2018 IEEE.
On the mathematical modeling of Memristors
Since the fourth fundamental element (Memristor) became a reality by HP labs, and due to its huge potential, its mathematical models became a necessity. In this paper, we provide a simple mathematical model of Memristors characterized by linear dopant drift for sinusoidal input voltage, showing a high matching with the nonlinear SPICE simulations. The frequency response of the Memristor’s resistance and its bounding conditions are derived. The fundamentals of the pinched i-v hysteresis, such as the critical resistances, the hysteresis power and the maximum operating current, are derived for the first time. © 2009 IEEE.
State space modeling of Memristor-based Wien oscillator
State space modeling of Memristor based Wien ‘A’ oscillator has been demonstrated for the first time considering nonlinear ion drift in Memristor. Time dependant oscillating resistance of Memristor is reported in both state space solution and SPICE simulation which plausibly provide the basis of realizing parametric oscillation by Memristor based Wien oscillator. In addition to this part Memristor is shown to stabilize the final oscillation amplitude by means of its nonlinear dynamic resistance which hints for eliminating diode in the feedback network of conventional Wien oscillator. © 2011 IEEE.
The modified single input Op-Amps memristor based oscillator
This paper introduces the modified single input Op-Amps memristor based oscillator. The oscillator is realized with ideal, LM741 and current feedback (AD844) Op-Amps where memristors replace resistors. The effect of memristor on the oscillation frequency and the oscillation condition that are totally independent is studied. This helped in studying the whole operation regime of the memristor. The effect of initial conditions on the circuit behavior is discussed. The dynamic poles of the oscillator after resistors replacement are illustrated. Sustained oscillation is obtained and simulated results are nearly matched to the calculated results. © 2013 IEEE.
Memristor-based balanced ternary adder
This paper introduces a memristor based ternary adder, which is an essential building block for any arithmetic ternary operations. The proposed ternary adder circuit tries to achieve the theoretical advantages of the ternary system, increase the density and decrease the processing time by using the memristor properties such as its hysteresis and nanotechnology. The general block diagram of the proposed circuit is illustrated based on memristors and its operation has been validated via different examples using PSPICE where simulation results show a great match. © 2013 IEEE.
The effect of numerical techniques on differential equation based chaotic generators
In this paper, we study the effect of the numerical solution accuracy on the digital implementation of differential chaos generators. Four systems are built on a Xilinx Virtex 4 FPGA using Euler, mid-point, and Runge-Kutta fourth order techniques. The twelve implementations are compared based on the FPGA used area, maximum throughput, maximum Lyapunov exponent, and autocorrelation confidence region. Based on circuit performance and the chaotic response of the different implementations, it was found that less complicated numerical solution has better chaotic response and higher throughput. © 2011 IEEE.