This paper presents a secured highly sensitive image encryption system suitable for biomedical applications. The pseudo random number generator of the presented system is based on two discrete logistic maps. The employed maps are: the one dimensional double humped logistic map as well as the two-dimensional delayed logistic map. Different analyses are introduced to measure the performance of the proposed encryption system such as: histogram analysis, correlation coefficients, MAE, NPCR as well as UACI measurements. The encryption system is proven to be highly sensitive to ±0.001% perturbation of the logistic maps parameters. The system is tested on medical images of palm print as well as Parkinson disease MRI images. © 2017 IEEE.
Biomedical image encryption based on double-humped and fractional logistic maps
This paper presents a secured highly sensitive image encryption system suitable for biomedical applications
On-the-Fly Parallel Processing IP-Core for Image Blur Detection, Compression, and Chaotic Encryption Based on FPGA
This paper presents a 3 in 1 standalone FPGA system which can perform color image blur detection in parallel with compression and encryption. Both blur detection and compression are based on the 3-level Haar wavelet transform, which is used as a common building block to save the resources. The compression is based on performing the hard thresholding scheme followed by the Run Length Encoding (RLE) technique. The encryption is based on the 128-bit Advanced Encryption Standard (AES), which is considered one of the most secure algorithms. Moreover, the modified Lorenz chaotic system is combined with the AES to perform the Cipher Block Chaining (CBC) mode. The proposed system is realized using HDL and implemented using Xilinx on XC5VLX50T FPGA. The system has utilized only 25% of the available slices. Furthermore, the system can achieve a throughput of 3.458 Gbps, which is suitable for real-time applications. To validate the compression performance, the system has been tested with all the standard 256times 256 images. It is shown that depending on the amount of details in the image, the system can achieve 30dB PSNR at compression ratios in the range of (0.08-0.38). The proposed system can be integrated with digital cameras to process the captured images on-the-fly prior to transmission or storage. Based on the application, the blurred images can be either marked for future enhancement or simply filtered out. © 2013 IEEE.
Reconfigurable chaotic pseudo random number generator based on FPGA
This paper presents an FPGA Pseudo Random Number Generator (PRNG) that is based on the Lorenz and Lü chaotic systems. These two systems are used to generate four different 3D chaotic attractors. One attractor is generated from Lorenz while the other three attractors are generated from Lü. The output attractor of the proposed PRNG can be reconfigured during real time operation using an efficient hardwired shifting and multiplexing scheme. Furthermore, in order to exploit the proposed reconfiguration feature, the proposed PRNG has been embedded in an FPGA cascaded encryption processor that ciphers the input data from one up to four times successively. In each ciphering operation the PRNG is set to a new configuration and is initialized according to a part of the encryption key. The size of the encryption key can be varied according to the number of required ciphering operations. The proposed PRNG has been realized using VHDL, synthesized on Xilinx using the FPGA device XC5VLX50T, and analyzed using MATLAB and the NIST statistical suite. The proposed PRNG has utilized only 1.4% from the FPGA’s slices, achieved an operating frequency up to 78 MHz, and successfully passed all the NIST statistical tests. © 2018 Elsevier GmbH
Finite precision logistic map between computational efficiency and accuracy with encryption applications
Chaotic systems appear in many applications such as pseudo-random number generation, text encryption, and secure image transfer
Generalized smooth transition map between tent and logistic maps
There is a continuous demand on novel chaotic generators to be employed in various modeling and pseudo-random number generation applications
Multiplierless chaotic Pseudo random number generators
This paper presents a multiplierless based FPGA implementation for six different chaotic Pseudo Random Number Generators (PRNGs) that are based on: Chua, modified Lorenz, modified Rössler, Frequency Dependent Negative Resistor (FDNR) oscillator, and other two systems that are modelled using the simple jerk equation
Generalized fractional logistic map encryption system based on FPGA
This paper introduces the design of a generalized fractional order logistic map suitable for pseudorandom number key generators and its application in an encryption system based on FPGA