Log-domain implementation of fractional-order element emulators


Novel fractional-order capacitor and inductor em-ulators are presented in this work, which offer fully electronic tunability of their characteristics and, simultaneously, reduced circuit complexity compared to those already introduced in the literature. This has been achieved through the utilization of the log-domain filtering for implementing the approximation of the required fractional-order differentiation/integration stages. The behavior of the presented topology is evaluated using the Cadence software and MOS transistor models provided by the 0.35?m Austria Mikro Systeme CMOS process. © 2019 IEEE.


Bertsias P., Psychalinos C., Elwakil A.S., Radwan A.G.


Fractional-order capacitors; Fractional-order differentiators; Fractional-order inductors; Fractional-order integrators

Document Type

Confrence Paper


2019 42nd International Conference on Telecommunications and Signal Processing, TSP 2019, Art. No. 8768875, PP. 106 to 109, Doi: 10.1109/TSP.2019.8768875

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