On the Implementation of a Rotated Chaotic Lorenz System on FPGA


Recent advances in engineering applications of chaos include multimedia security, disturbance modeling in power systems and performance enhancement of electronic circuits among others. This paper discusses the implementation of a rotated Lorenz chaotic system on a Field Programmable Gate Array (FPGA). Unlike most published work, we do not rely on Hardware Description Language (HDL) code generated from MATLAB/SIMULINK using general code conversion tools like HDL coder. Instead, we code the system and all of its modules using the Verilog HDL and highlight the benefits of taking this approach in allowing for a systematic design procedure that tends to minimize the complexity of the design, the number of design errors and simplifies the debugging process. We anticipate that by using Verilog HDL and not relying on converters-generated code, we can improve on hardware resource utilization, synthesis frequency, accuracy, and throughput. The platform used is the DE2-115 development board equipped with Altera Cyclone IV FPGA device. © 2019 IEEE.


Orabi H., Elnawawy M., Sagahyroon A., Aloul F., Elwakil A.S., Radwan A.G.


Chaotic systems; FPGA; Lorenz system

Document Type

Confrence Paper


Proceedings – APCCAS 2019: 2019 IEEE Asia Pacific Conference on Circuits and Systems: Innovative CAS Towards Sustainable Energy and Technology Disruption, Art. No. 8953183, PP. 417 to 422, Doi: 10.1109/APCCAS47518.2019.8953183

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