Experimental verification of triple lobes generation in fractional memristive circuits

Abstract

Recently, the triple-lobe behavior is found in the I-V characteristics of some memristive devices generating another non-zero pinchoff point. In this paper, a flux-controlled memristive model is developed to generate the triple-lobe behavior (double pinchoff points) based on a fractional second-order model. The conditions for observing triple lobes are derived besides the coordinates of the pinchoff points. Different scenarios have been considered by changing the model parameters and fractional order. Furthermore, the minimum and maximum achievable conductances are analyzed and mathematically derived. In addition, a floating emulation circuit is introduced and analyzed, which is able to generate the triple-lobe behavior and mimic the dynamics of the proposed fractional modeling equation, showing good matching with the mathematical model. Finally, the obtained triple-lobe behaviors have been verified using experiments with fractional orders: 0.3 and 0.4. © 2018 IEEE.

Authors

Hamed E.M., Fouda M.E., Alharbi A.G., Radwan A.G.

Keywords

Fractional-order memristor; memristor; pinched hysteresis; triple lobes

Document Type

Journal

Source

IEEE Access, Vol. 6, Art. No. 8543141, PP. 75169 to 75180, Doi: 10.1109/ACCESS.2018.2882942

Scopus Link

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