Ternary Functions Design Using Memristive Threshold Logic


Memristive threshold logic (MTL) concept is emerged in many circuits to enable high-performance systems in terms of power, energy, area, and delay. This paper proposes a systematic method for building two-bit ternary number functions based on the MTL concept. The proposed method is applied to build the basic ternary arithmetic operations. The implementation of two-bit adder and multiplier is presented in the unbalanced ternary number representation. The proposed designs are verified by using VTEAM memristor and Stanford CNTFET transistor models. Finally, a comparison between the proposed circuits and related work presented in this paper is discussed. It shows that the area in case of the ternary adder is reduced by 30% and 76% and in case of the ternary multiplier by considering that memristors can be stacked above the transistors. In addition, this reduction in the number of transistors reduces the circuit static power and hence improving the overall ternary circuits performance. © 2013 IEEE.


Soliman N., Fouda M.E., Alhurbi A.G., Said L.A., Madian A.H., Radwan A.G.


CNTFET; mermistor; MTL; NTI; PTI; SBB; SBI; STB; STI; Ternary numbers; threshold logic; TLG; VTEAM

Document Type



IEEE Access, Vol. 7, Art. No. 8692719, PP. 48371 to 48381, Doi: 10.1109/ACCESS.2019.2909500

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