Abstract
This paper introduces all the possible topologies of the Wien bridge oscillator family. This family has 72 topologies, 24 of them contain only RC or RL pairs, and the rest contain mixed pairs. The complete mathematical analysis of all twelve possible capacitive-based topologies is proposed in the fractional-order domain. The investigated circuits can be categorized into two groups, each with a similar characteristic equation. Three integer-order approximation techniques for the Laplacian operator s? are employed to solve and simulate the Wien bridge system. The studied approximations are those of Matsuda, Oustaloup, and Valsas network. Fractional-order capacitor (FOC) emulators are built using these approximations and applied in the circuit simulation. Comparisons are made on different levels, starting with the mathematical solution of the characteristic equation, followed by PSpice simulation, which compares topologies of the Wien bridge oscillator family. Hardware implementation of the FOC emulators is presented applying passive discrete components using the Foster-I technique. Additionally, sensitivity tests of the discrete components of the FOC emulators are performed using Monte Carlo analysis. Experimental results are introduced to validate the theoretical findings. © 2019, Springer Science+Business Media, LLC, part of Springer Nature.
Authors
Elwy O., Said L.A., Madian A.H., Radwan A.G.
Keywords
Approximations; Fractional-order capacitor; Matsuda; Oustaloup; Valsa; Wien bridge oscillator family
Document Type
Journal
Source
Circuits, Systems, and Signal Processing, Vol. 38, PP. 3931 to 3951, Doi: 10.1007/s00034-019-01057-6