FPGA implementation of sound encryption system based on fractional-order chaotic systems


This paper introduces design and FPGA implementation of sound encryption system based on a fractional-order chaotic system. Also, it presents the FPGA implementation of Tang, Yalcin, and Özo?uz fractional order chaotic systems. The Grunwald-Letnikov (GL) definition is used to generalize the investigated systems into the fractional-order domain. Also, the variation of parameters for each system is investigated against the window size of the GL definition. Xilinx ISE 14.5 is used to simulate the proposed design. Also, some hardware reduction techniques are applied to decrease hardware utilization and increase throughput. Moreover, Yalcin system is employed as a chaotic generator in a speech encryption algorithm. Security analysis techniques are presented to show the robustness of the proposed algorithm. They include basic perceptual and statistical aspects, the NIST tests, key space analysis, mean square error (MSE) and key sensitivity. Statistical analyses including correlation, histogram, spectrogram, and entropy analysis are presented. The system is implemented on Artix-7 FPGA with one clock latency. Finally, experimental results are illustrated. © 2019 Elsevier Ltd


Abd El-Maksoud A.J., Abd El-Kader A.A., Hassan B.G., Rihan N.G., Tolba M.F., Said L.A., Radwan A.G., Abu-Elyazeed M.F.


Chaos; Chua; FPGA; Fractional calculus; Speech encryption

Document Type



Microelectronics Journal, Vol. 90, PP. 323 to 335, Doi: 10.1016/j.mejo.2019.05.005

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