This paper proposes a general prototype fractional order filter based on a two-port network concept with four external impedances. Three induced classifications from the general prototype are extracted with one, two and three external impedances, achieving ten possible generalized topologies. The external impedances are fractional-order elements and resistors. There are forty-six filters divided into twenty-two and twenty-four different general fractional filters of order “?” and order “? + ?”, respectively. The general transfer functions, the necessary network conditions, and the critical frequencies are presented for each topology in terms of the transmission matrix parameters of a general two-port network and the fractional order parameters. These aspects add extra degrees of freedom, which increase the design flexibility and controllability; it is up to the designer to select any network suitable for his application. Six special cases of two-port networks based on the second generation current conveyor (CCII) active building block are synthesized to realize the proposed topologies. CCII family has four members that yield twenty-four different transmission matrices, resulting 480 filters. Due to the large number of the introduced filters, selected cases are investigated in detail to validate the theoretical findings through numerical simulations, Spice simulations, and experimental results. © 2019 Elsevier GmbH
Emulation circuits of fractional-order memelements with multiple pinched points and their applications
This paper proposes voltage- and current-controlled universal memelements emulators. They are employed to realize the floating and grounded fractional-order memelements. The proposed emulators are implemented using different active blocks such as the second-generation current conveyor (CCII), Differential input double output transconductance amplifier (DOTA + ), balanced output CCII, and Differential voltage current conveyor (DVCC) with analog voltage multiplier. One of the main characteristics of the memristive elements is hysteresis loop behaviour with one pinched point, and the higher-order memelements have multiple pinched points. The higher fractional-order memductance (FOM) and inverse memductance (FOIM) emulators are proposed, which achieve multiple pinched-off points. The coordinates of the multiple pinched-off points and the conditions to achieve them are discussed in the I-V plane. Additionally, the effect of different orders ? of the fractional-order capacitor (FOC) on the memelements characteristic is discussed. The circuit simulations for the proposed emulators have been verified using PSPICE simulations and validated experimentally at different orders. Finally, the grounded proposed emulator is employed in Chua’s chaotic oscillator as an application presenting the effect of fractional-order on the chaotic response. Also, the floating proposed emulator is applied to a relaxation oscillator, to show the reliability of the proposed emulator. © 2020
A general emulator for fractional-order memristive elements with multiple pinched points and application
In this paper, X-controlled universal fractional-order memelements (FOMEs) emulator is proposed
General fractional order mem-elements mutators
This paper proposes the realization of grounded and floating fractional order mem-elements (FOMEs) based on two- and three-port mutators, respectively