The efficiency of the hardware implementations of fractional-order systems heavily relies on the efficiency of realizing the fractional-order derivative operator
Two-Dimensional Rotation of Chaotic Attractors: Demonstrative Examples and FPGA Realization
2019Aloul F.El-Sedeek A.Elnawawy M.Elwakil A.S.Fahmy H.A.JournalOrabi H.Radwan A.G.Sagahyroon A.Sayed W.S.
In this work, we demonstrate the possibility of performing two-dimensional rotation on a chaotic system
A general emulator for fractional-order memristive elements with multiple pinched points and application
In this paper, X-controlled universal fractional-order memelements (FOMEs) emulator is proposed
Symmetric encryption algorithms using chaotic and non-chaotic generators: A review
This paper summarizes the symmetric image encryption results of 27 different algorithms, which include substitution-only, permutation-only or both phases
Memristor FPGA IP core implementation for analog and digital applications
Exploring the nonlinear dynamics of the memristors is essential to be adequately used in the applications
Digital Emulation of a Versatile Memristor with Speech Encryption Application
Memristor characteristics such as nonlinear dynamics, state retention and accumulation are useful for many applications
Generalized hardware post-processing technique for chaos-based pseudorandom number generators
This paper presents a generalized post-processing technique for enhancing the pseudorandomness of digital chaotic oscillators through a nonlinear XOR-based operation with rotation and feedback
Multiplierless chaotic Pseudo random number generators
This paper presents a multiplierless based FPGA implementation for six different chaotic Pseudo Random Number Generators (PRNGs) that are based on: Chua, modified Lorenz, modified Rössler, Frequency Dependent Negative Resistor (FDNR) oscillator, and other two systems that are modelled using the simple jerk equation
Fully digital jerk-based chaotic oscillators for high throughput pseudo-random number generators up to 8.77 Gbits/s
This paper introduces fully digital implementations of four different systems in the 3rd order jerk-equation based chaotic family using the Euler approximation
Software and Hardware Implementation Sensitivity of Chaotic Systems and Impact on Encryption Applications
This paper discusses the implementation sensitivity of chaotic systems added to their widely discussed sensitivities to initial conditions and parameter variation