Do the Bio-impedance Models Exhibit Pinched Hysteresis?

Recently, pinched hysteresis has been found in the electrical modelling of regular plant tissues. Usually, the biological tissues are characterized in the frequency domain using bio-impedance analyzers without investigating the time domain, which would show the pinched hysteresis. In this paper, the current-voltage analysis of some of the widely known electrical bio-impedance models is studied. The investigated models are the single dispersion Cole-impedance model, the double dispersion Cole-impedance model and the fractional-order simplified Hayden model to prove that these models can not exhibit pinched hysteresis. It is proved mathematically in this paper that there are no pinch-off points that would exist in these models. These results are verified with numerical simulations of three different plants: tomato, carrot and banana, concluding that the bioimpedance modelling needs a nonlinear element to model the pinched hysteresis in the current-voltage behaviour of these tissues. © 2020 IEEE.

Vulnerable Road Users Detection and Tracking using YOLOv4 and Deep SORT

Over the years, The detection and tracking of Vulnerable Road Users (VRUs) have become one of the most critical features of self-driving car components. Because of its processing efficiency and better detection algorithms, tracking-by-detection appears to be the best paradigm. In this paper, a detection-based tracking approach is presented for Multiple VRU Tracking of video from an inside-vehicle camera in real-time. YOLOv4 scans every frame to detect VRUs first, then Simple Online and Realtime Tracking with a Deep Association Metric (Deep SORT) algorithm, which is customized for multiple VRU tracking, is applied. The results of our experiments on both the Joint Attention in Autonomous Driving (JAAD) and Multiple Object Tracking (MOT) datasets exhibit competitive performance. © 2021 IEEE.

Tunable fractional-order band-pass filter of order 2?

In this work, a novel implementation of a tunable fractional-order bandpass filter of order 2? is proposed. The transfer function of the presented filter is approximated using the second-order Continued Fraction Expansion (CFE) approximation technique. The filter transfer function is realized using the Inverse Follow the Leader Feedback (IFLF) structure. The Operational Transconductance Amplifiers (OTAs) are used to implement the filter circuit. Furthermore, the proposed filter is tunable by varying the value of only one bias current, which adjust the value of ?. The simulations are performed using Matlab and Cadence software with UMC 0.13? m CMOS technology. © 2019 IEEE.

Generalized family of fractional-order oscillators based on single CFOA and RC network

This paper presents a generalized family of fractional-order oscillators based on single CFOA and RC network. Five RC networks are investigated with their general state matrix, and design equations. The general oscillation frequency, condition and the phase difference between the oscillatory outputs are introduced in terms of the fractional order parameters. They add extra degrees of freedom which in turn increase the design flexibility and controllability that is proved numerically. Spice simulations are introduced to validate the theoretical findings. © 2017 IEEE.

Generalized ?+?-order Filter Based on Single CCII

Different generalized filters topologies are proposed in the fractional-order domain. Three voltage-mode topologies and one current-mode topology are used to realize several types of fractional-order filters by applying different admittances combinations. The proposed topologies are designed using a single second-generation current conveyor (CCII-) and two fractional-order capacitors, which add more degrees of freedom for the design. The generalized Fractional Transfer Function (FTF) for each proposed topology is investigated where the fractional-order low-pass, band-pass, high-pass, and notch filters with ?+?)-order are realized. The Numerical results are provided where the stability analysis is presented for different cases. Also, the PSPICE simulations are presented to prove the theoretical findings of selected cases. © 2020 IEEE.

Two topologies of fractional-order oscillators based on CFOA and RC networks

This paper presents two general topologies of fractional order oscillators. They employ Current Feedback Op-Amp (CFOA) and RC networks. Two RC networks are investigated for each presented topology. The general oscillation frequency, condition and the phase difference between the oscillatory outputs are investigated in terms of the fractional order parameters. Numerical simulations and P-Spice simulation results are provided for some cases to validate the theoretical findings. The fractional order parameters increase the design flexibility and controllability which is proved by the provided experimental results. © 2018 IEEE.

Dynamics of fractional and double-humped logistic maps versus the conventional one

This paper presents the dynamic analysis of two discrete logistic chaotic maps versus the conventional map. The first map is the fractional logistic map with the extra degrees of freedom provided by the added number of variables. It has two more variables over the conventional one. The second map is the double-humped logistic map. It is a fourth-order map which increases the non-linearity over the conventional one. The dynamics of the three maps are discussed in details, including mathematical derivations of fixed points, stability analysis, bifurcation diagrams and the study of their chaotic regions. The chaotic behavior of the three maps, is investigated using the Maximum Lyapunov exponent (MLE). © 2017 IEEE.

Frational Order Inverse Filters Based on CCII Family

This paper proposes two generalized topologies of fractional order inverse filters (FOIF). All possible realizations of each topology are investigated using the second generation current conveyor (CCII) family. Inverse fractional highpass (IFHPF), inverse fractional bandpass (IFBPF), and inverse fractional lowpass (IFLPF) filters are realized using the same topology based on the generalized admittances. Numerical and P-Spice simulation results are presented for selected cases to approve the theoretical findings. The fractional order parameters increase the design flexibility and controllability which is validated experimentally. © 2019 IEEE.

A Universal Fractional-Order Memelement Emulation Circuit

This paper proposes a current-/voltage-controlled universal emulator that can realize any fractional-order memelements (FOME). The proposed emulator consists of second-generation current conveyors (CCII) block, two switches, and a multiplier/divider block. The first switch controls the emulator mode (voltage or current), while, the other controls the type of the emulated FOME. The influence of the fractional-order capacitor (FOC) on the pinched hysteresis loop (PHL) area, is discussed which increases the controllability on the double loop area and the working frequency range. Numerical and PSPICE simulations are presented for selected cases to prove the theoretical findings. © 2019 IEEE.

On Series Connections of Fractional-Order Elements and Memristive Elements

This paper proposes a current-controlled fractional-order memristor emulator based on one active building block. The emulator consists of a multiplication mode current conveyor (MMCC) block with three passive elements. Additionally, the series connection of fractional-order inductor (FOI) and fractional-order capacitor (FOC) with memristive elements in the i-v plane is demonstrated numerically for different cases. Changing the order of the FOC or FOI and its effect on the pinched hysteresis loop area are investigated, which improve the controllability of the double loop area, the location of the pinched point, and the operating frequency range. Numerical, PSPICE simulation results, and experimental verification are investigated for different cases to approve the theoretical findings. Moreover, a sensitivity analysis using Monte Carlo simulations for the tolerance of the discrete components of the memristor emulator is investigated. © 2020 IEEE.