This paper presents the generalization of a delayed version of the logistic map
Generalized synchronization involving a linear combination of fractional-order chaotic systems
In this paper, a generalized scheme for synchronizing a fractional order chaotic system with another one or with a linear combination of two other fractional order chaotic systems is presented
Switched active control synchronization of three fractional order chaotic systems
This paper discusses the continuous effect of fractional order parameter on two chaotic systems
Analysis of bus width and delay on a fully digital signum nonlinearity chaotic oscillator
This paper introduces the first fully digital implementation of a 3rd order ODE-based chaotic oscillator with signum nonlinearity
FPGA Implementation of X- and Heart-shapes Controllable Multi-Scroll Attractors
This paper proposes new multi-scrolls chaotic systems which is called the X-shape
Permutation techniques based on discrete chaos and their utilization in image encryption
To achieve the Shannon’s confusion and diffusion properties, an image encryption algorithm should include permutations and substitutions
Fully digital 1-D, 2-D and 3-D multiscroll chaos as hardware pseudo random number generators
This paper introduces the fully digital implementation of a 1-D multiscroll chaos generator based on a staircase nonlinearity in the 3rd-order jerk system using the Euler approximation
The effect of multi-scrolls distribution on image encryption
This paper introduces two generalized tent maps where the conventional map is a special case
A Digital Hardware Implementation for A new Mixed-Order Nonlinear 3-D Chaotic System
This paper introduces a new encryption/decryption scheme based on a dynamic substitution box concept
Secure DS-CDMA spreading codes using fully digital multidimensional multiscroll chaos
This paper introduces a generalized fully digital hardware implementation of 1-D, 2-D and 3-D multiscroll chaos through sawtooth nonlinearities in a 3rd order ODE with the Euler approximation, wherein low-significance bits pass all NIST SP