This paper introduces a new encryption/decryption scheme based on a dynamic substitution box concept. Values of the proposed S-Box are different for each sample depending on the behavior of a memristor-based chaotic system. MATLAB simulations and FPGA implementation for the circuit are presented with throughput 4.266 Gbit/s. Also, FPGA realization for encryption/decryption scheme is proposed. Entropy, MSE, correlation coefficient tests are applied on two different input files to examine the efficiency of this cryptosystem. © 2018 IEEE.
A Simple BJT Inverse Memristor Emulator and Its Application in Chaotic Oscillators
A generalized inverse memristor emulator is proposed based on two BJT transistors as a diode connected with a first order parallel RC filter. The mathematical model of the circuit is presented where the pinched hysteresis loops (PHLs) with different periodic stimuli are analyzed. The numerical, P-Spice simulations and experimental results are presented indicating that the introduced emulator is a simple voltage-controlled generalized inverse memristor. The results show that the PHLs area is increased with increasing the applied frequency. In addition, the proposed emulator is employed in a simple chaotic circuit. The effect of the inductor’s values on the chaotic system is investigated and the P-Spice simulations are performed to approve the numerical results. © 2019 IEEE.
Image encryption using generalized tent map
This paper introduces two generalized tent maps where the conventional map is a special case. Although the output of the conventional tent map shows different responses, it has only one control parameter that limits its behavior and applications. The proposed generalized tent maps increase the degrees of freedom and produce a versatile response that can fit many applications. The characteristics of each generalization are discussed such as: fixed points, bifurcation diagrams, and Lyapunov exponents. Finally, a simple image encryption application, based on the generalized tent maps, is presented for the design of long encryption key using the added parameters. Moreover, statistical and sensitivity analysis are presented to demonstrate the benefits of the generalized maps. © 2013 IEEE.
Design of pseudo random keystream generator using fractals
This paper presents a novel method for designing a pseudo random keystream generator (PRKG) based on fractal images. Although a fractal image has high correlation between its pixels, the proposed technique succeeds in almost eliminating this correlation and the output stream passes the NIST statistical test suite. The post-processing on the fractals is based only on a confusion process and uses a nonlinear network with a delay block to randomize the output stream. Many statistical measures and the NIST suite have been used to evaluate the processed fractals and the results are promising. As an example to validate the PRKG, the output stream is used in a simple image encryption system. The encrypted image is tested by calculating pixel correlations, differential attack measures, entropy and it also passes the NIST test suite. © 2013 IEEE.
Generalized delayed logistic map suitable for pseudo-random number generation
This paper presents the generalization of a delayed version of the logistic map. The effect of the added two general parameters is studied, which offers the option of having three different maps. The dynamic behavior of the vertical, zooming and the general map is analyzed. The study of the fixed points, stability ranges and bifurcation diagram of the delayed logistic map at hand is detailed in this work. The flow of the system behavior from stability to chaos is also presented with its transient response as well as its phase plane portraits. Moreover, using the general parameters, the option of designing any specific map is validated by some design examples, which makes it more optimal for any specific applications. The added general parameters offer increased randomness with controllability of the map design, making it more suitable for pseudo-random sequence generators which are used in image encryption algorithms and in secure communication transfer. © 2015 IEEE.
Design of a generalized bidirectional tent map suitable for encryption applications
The discrete tent map is one of the most famous discrete chaotic maps that has widely-spread applications. This paper investigates a set of four generalized tent maps where the conventional map is a special case. The proposed maps have extra degrees of freedom which provide different chaotic characteristics and increase the design flexibility required for many applications. Mathematical analyses for generalized positive and mostly positive tent maps include: bifurcation diagrams relative to all parameters, effective range of parameters, bifurcation points. The maximum Lyapunov exponent (MLE) is also calculated to indicate chaotic behavior. Various scales of the bifurcation diagram are discussed for each generalized map as well as system responses versus the added parameters. © 2015 IEEE.
Chaotic systems based on jerk equation and discrete maps with scaling parameters
In the recent decades, applications of chaotic systems have flourished in various fields. Hence, there is an increasing demand on generalized, modified and novel chaotic systems. In this paper, we combine the general equation of jerk-based chaotic systems with simple scaled discrete chaotic maps. Numerical simulations of the properties of two systems, each with four control parameters, are presented. The parameters show interesting behaviors and dependencies among them. In addition, they exhibit controlling capabilities of the ranges of system responses, hence the size of the attractor diagram. Moreover, these behaviors and dependencies are analogous to those of the corresponding discrete chaotic maps. © 2017 IEEE.
Hardware Speech Encryption Using a Chaotic Generator, Dynamic Shift and Bit Permutation
This paper proposes a speech encryption and decryption system, its hardware architecture design and FPGA implementation. The system utilizes Nosé Hoover chaotic generator and/or dynamic shift and bit permutation. The effect of different blocks in the proposed encryption scheme is studied and the security of the system is validated through perceptual and statistical tests. The complete encryption scheme is simulated using Xilinx ISE 14.5 and realized on FPGA Xilinx Kintex 7, presenting the experimental results on the oscilloscope. The efficiency is also validated through hardware resources utilization compared to previous works based on maximum frequency and throughput. © 2018 IEEE.
Design, implementation and analysis of fully digital 1-D controllable multiscroll chaos
This paper introduces the fully digital implementation of a 1-D multiscroll chaos generator based on a staircase nonlinearity in the 3rd-order jerk system using the Euler approximation. For the first time, digital design is exploited to provide real-time controllability of (i) number of scrolls, (ii) position in 1-D space, (iii) Euler step size and (iv) system parameter. The effect of variations in these fields on the maximum Lyapunov exponent (MLE) is analyzed. The system is implemented using Verilog HDL and synthesized on an Xilinx Virtex 4 FPGA, exhibiting area utilization less than 3.5% and high performance with experimentally verified throughput up to 3.33 Gbits/s. This fully digital system enables applications in modulation schemes and chaos-based cryptosystems without analog to digital conversion. © 2011 IEEE.
The effect of numerical techniques on differential equation based chaotic generators
In this paper, we study the effect of the numerical solution accuracy on the digital implementation of differential chaos generators. Four systems are built on a Xilinx Virtex 4 FPGA using Euler, mid-point, and Runge-Kutta fourth order techniques. The twelve implementations are compared based on the FPGA used area, maximum throughput, maximum Lyapunov exponent, and autocorrelation confidence region. Based on circuit performance and the chaotic response of the different implementations, it was found that less complicated numerical solution has better chaotic response and higher throughput. © 2011 IEEE.