Modeling woody plant tissue using different fractional-order circuits

This chapter presents results on the most suitable bio-impedance circuits for modeling woody plants. The modified double-shell, the modified triple Cole-Cole, and the traditional wood circuit models are compared for fitting experimentally measured data. Consequently, a modified circuit model is proposed. This model gives the best results for all interelectrode spacing distances when compared to the other circuits. All impedance data have been measured using the research-grade SP150 electrochemical station in the frequency range 0.1 Hz to 200 kHz. The fitting is done using the Zfit of the impedance analyzer SP150. © 2022 Elsevier Inc. All rights reserved.

Fractional-order oscillators based on a single Op-Amp

This chapter introduces a family of fractional-order oscillators based on a single operational amplifier (Op-Amp) with two fractional-order capacitors. Twelve different fractional-order oscillator circuits are investigated where the state matrix, oscillation frequency, and oscillation condition for each circuit are presented. The phase difference between the two oscillatory outputs is deduced in terms of the fractional-order parameters. The fractional-order parameter enhances the oscillator performance by providing an extra degree-of-freedom. Also, the resulting circuits provide independent controllability for the phase difference and the oscillation frequency. Numerical simulations using MATLAB® are performed to study the effect of the fractional-order parameters on the circuit response. Moreover, PSpice simulations are performed on different cases using two different fractional-order capacitors. Selected cases are verified experimentally to confirm the theoretical findings. © 2022 Elsevier Inc. All rights reserved.

Survey on Two-Port Network-Based Fractional-Order Oscillators

This chapter merges the fractional calculus and two-port networks in oscillator design. The fractional-order elements ? and ? add extra degrees of freedom that increase the design flexibility and frequency band while providing control over the phase difference. A prototype of the fractional-order two-port network oscillators is introduced. It consists of a general two-port network and three impedances distributed as input, output, and a feedback impedance. Three different two-port network classifications are obtained according to the ground location. This chapter focuses on one of these classifications from which two derived prototypes can be extracted. The general analytical formulas of the oscillation frequency and condition as well as the phase difference are derived in terms of the transmission matrix parameter of a general two-port network. Different active building blocks are used to serve as a two-port network. Numerical, Spice simulations, and experimental results are given to validate the presented analysis. © 2018 Elsevier Inc. All rights reserved.

FPGA Implementation of Fractional-Order Chaotic Systems

This chapter introduces two FPGA implementations of the fractional-order operators: the Caputo and the Grünwald-Letnikov (GL) derivatives. First, the Caputo derivative is realized using nonuniform segmentation to reduce the size of the Look-Up Table. The Caputo implementation introduced can generate derivatives of previously defined functions only. Generic and complete hardware architecture of the GL operator is realized with different memory window sizes. The generic architecture is used as a block to implement several fractional-order chaotic systems. The investigated systems include Borah, Chen, Liu, Li, and Arneodo fractional-order chaotic systems. Different interesting attractors are realized under various parametric changes with distinct step sizes for different fractional orders. To verify the chaotic behavior of the generated attractors, the Maximum Lyapunov Exponent is calculated for each system at different parameter values. © 2018 Elsevier Inc. All rights reserved.

Active and passive sensitivity analysis for the second-order active RC filter families using operational amplifier: a review

This work is a review article that sheds light on the active and passive sensitivities of the active RC filters based on opamp. This work provides a detailed analysis through different filters realization criteria and sensitivity summary tables and quantitative insight by discussing the most significant. However, some are almost forgotten, filters families in the literature over decades. A detailed mathematical analysis for the passive sensitivity to compare the filters’ realizations is presented. The concept of dealing between filter design theory and filter design circuit realization is highlighted. Some filters families are chosen from the literature for the analysis. Some detailed specifications tables for each filter family are given. Monte Carlo simulation is carried out on some filters to compare their passive sensitivity. Furthermore, the effect of the active sensitivity of some filters is verified through simulation by adjusting the input common-mode voltage to lower the DC gain of the amplifier. The results of the simulation match with the theoretical analysis and the summary provided in the specifications tables. © 2022, The Author(s).

On the Design Flow of the Fractional-Order Analog Filters Between FPAA Implementation and Circuit Realization

This work explicitly states the design flows of the fractional-order analog filters used by researchers throughout the literature. Two main flows are studied: the FPAA implementation and the circuit realization. Partial-fraction expansion representation is used to prepare the approximated fractional-order response for implementation on FPAA. The generalization of the second-order active RC analog filters based on opamp from the integer-order domain to the fractional-order domain is presented. The generalization is studied from both mathematical and circuit realization points of view. It is found that the great benefit of the fractional-order domain is that it adds more degrees of freedom to the filter design process. Simulation and experimental results match the expected theoretical analysis. © 2013 IEEE.

A Unified FPGA Realization for Fractional-Order Integrator and Differentiator

This paper proposes a generic FPGA realization of an IP core for fractional-order integration and differentiation based on the Grünwald–Letnikov approximation. All fractional-order dependent terms are approximated to simpler relations using curve fitting to enable an efficient hardware realization. Compared to previous works, the proposed design introduces enhancements in the fractional-order range covering both integration and differentiation. An error analysis between software and hardware results is presented for sine, triangle and sawtooth signals. The proposed generic design is realized on XC7A100T FPGA achieving frequency of 9.328 MHz and validated experimentally for a sine input signal on the oscilloscope. The proposed unified generic design is suitable for biomedical signal processing applications. In addition, it can be employed as a laboratory tool for fractional calculus education. © 2022 by the authors. Licensee MDPI, Basel, Switzerland.

An Encryption Application and FPGA Realization of a Fractional Memristive Chaotic System

The work in this paper extends a memristive chaotic system with transcendental nonlinearities to the fractional-order domain. The extended system’s chaotic properties were validated through bifurcation analysis and spectral entropy. The presented system was employed in the substitution stage of an image encryption algorithm, including a generalized Arnold map for the permutation. The encryption scheme demonstrated its efficiency through statistical tests, key sensitivity analysis and resistance to brute force and differential attacks. The fractional-order memristive system includes a reconfigurable coordinate rotation digital computer (CORDIC) and Grünwald–Letnikov (GL) architectures, which are essential for trigonometric and hyperbolic functions and fractional-order operator implementations, respectively. The proposed system was implemented on the Artix-7 FPGA board, achieving a throughput of 0.396 Gbit/s. © 2023 by the authors.